1. Field of the Invention
The present invention relates generally to the field of data processing and, more specifically, to using a data cache as a dynamically sized buffer to pass data from producers to consumers.
2. Description of the Related Art
In a conventional processing pipeline architecture data is processed by different units, with upstream units producing intermediate data that is consumed by downstream units. Since the rate of consumption and production may vary, buffers are typically deployed between the different units to temporarily store the intermediate data and avoid stalling the upstream units. The buffers are dedicated storage rather than a shared resource. In order to accommodate diverse consumption and production rates, the size of a buffer should be increased. However, since the buffer consumes die area that would otherwise be used for processing circuitry, it is desirable to limit the size of each buffer.
As the foregoing illustrates, what is needed in the art is a mechanism for efficiently buffering intermediate data in a processing pipeline architecture.